Reducción de los tiempos de cómputo de la Migración Sísmica usando FPGAs y GPGPUs: Un artículo de revisión
Main Article Content
Keywords
Evaluación del desempeño, FPGA, GPGPU, Métodos sísmicos de exploración, Migración Sísmica.
Resumen
Este artículo hace una revisión entorno a los esfuerzos que actualmente se están realizando con el propósito de reducir el tiempo de cómputo de la MS. Nosotros introducimos los métodos más utilizados para realizar el proceso de Migración, así como también las dos arquitecturas computacionales que están ofreciendo mejores tiempos de procesamiento. Revisamos las implementaciones más representativas de este proceso sobre estas dos tecnologías y resumimos los aportes de cada una de estas investigaciones. El artículo finaliza con un análisis acerca de la dirección que deben tomar futuras investigaciones en esta área.
PACS: 93.85.Rt
MSC: 68M20
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Referencias
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[29] S. Baghel and R. Shaik, “FPGA implementation of Fast Block LMS adaptive filter using Distributed Arithmetic for high throughput,” in Communications and Signal Processing (ICCSP), 2011 International Conference on, 2011, pp. 443–447. 272
[30] M. Rawski, P. Tomaszewicz, H. Selvaraj, and T. Luba, “Efficient Implementation of digital filters with use of advanced synthesis methods targeted FPGA architectures,” in Digital System Design, 2005. Proceedings. 8th Euromicro Conference on, 2005, pp. 460–466. 272
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http://dx.doi.org/10.1155/2009/382983 273
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Article Sidebar
Publicado
mar 20, 2013
Article Details
Cómo citar
Fajardo, C., Villar, J. C., & Pedraza, C. (2013). Reducción de los tiempos de cómputo de la Migración Sísmica usando FPGAs y GPGPUs: Un artículo de revisión. Ingeniería Y Ciencia, 9(17), 261–293. https://doi.org/10.17230/ingciecia.9.17.13
Número
Sección
Artículos de revisión
Agencias de apoyo
Universidad Industrial de Santander , Departamento Administrativo de Ciencia, Tecnología e Innovación-Colciencias
Biografía del autor/a
Carlos Fajardo, Universidad Industrial de Santander
Ph.D(c)Javier Castillo Villar, Universidad Rey Juan Carlos
Doctor en Ingeniería InformáticaCésar Pedraza, Universidad Santo Tomás
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